As AI and IoT Space See A Major Boom, Open Source RISC-V Chips Can Address The Computing Needs

SiFive and Open-Silicon, two global giants of the semiconductor industry hosted Bangalore’s first RISC-V Tech Symposium. Attended by industry leaders and dignitaries such as Vivek Tyagi, Director, Western Digital; Chandan Haldar, CEO, Morphing Machines; Dr. Krste Asanovic, Chairman of RISC-V Foundation and Co-Founder and Chief Architect of SiFive, and Shafy Eltoukhy, SVP and General Manager, Open-Silicon, among others, it aimed to highlight the use cases on RISC-V, its impact on the semiconductor industry and how it can further processor innovation through open standard collaboration.
Developed by the University of California in 2010, RISC-V is an open ISA (Instruction Set Architecture) and RISC-V based chips could be the next game changer in the AI and IoT market. At a time when chip architecture has received renewed interest from a spate of startups and leading chipmakers like Intel, AMD, the open instruction set architecture based RISC-V can disrupt the market significantly.
RISC-V based chips are increasingly being preferred by semiconductor companies, chip design organisations, startups and governments across the globe to deliver solutions in a fast and efficient manner. As the speakers discussed the nuances of standardisation of RISC-V ISA for all computing devices, they also provided impetus on AI as the next revolution in digital world, innovation for a data-centric world, high bandwidth memory IP subsystem and RISC- V as a game changer for startups.
 
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