GOWIN Semiconductor Corp., the world’s leading innovator of programmable logic devices, announces its development of RISC-V Microprocessor IP implemented in their current ARORAÒ Family GW-2A FPGA products. In addition, GOWIN launches an Industry Early Adopter Program to kickstart engineering design activity. The Industry EAP includes: an FPGA programming bit-file reference design with RISC-V Microprocessor core, AHB & APB Bus, Memory Control & Peripherals, as well as the GW-2A development board for a complete, ready-to-use solution. RISC-V is a free and open ISA enabling a new era of processor innovation through open standard collaboration. The RISC-V ISA has been designed with small, fast, and low-power real-world implementations in mind without over-architecting for a particular microarchitecture style. The instruction set also has a substantial body of supporting software for a comprehensive design ecosystem. To read more, please visit: http://www.gowinsemi.com/about/detail/18/.]]>