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SiFive And Open-Silicon Host The Final RISC-V Tech Symposium 2018 In New Delhi

By September 4, 2018May 12th, 2021No Comments

SiFive and Open-Silicon, two global giants of the semiconductor industry concluded their six-city RISC-V Tech Symposium Tour in the capital city. The Symposiums started in Hyderabad and were also conducted in Bangalore, Chennai, Pune and Kolkata. The event was attended by academic leaders and dignitaries such as Naresh Rana, Manager of Business Development, Western Digital, Pankaj Kakkar, Solutions Group Director, Cadence, Smruti Ranjan Sarangi, Associate Professor, CSE, IIT Delhi, Kunal Ghosh, Director & Co-Founder, VSD, Anagha Ghosh, Business Head & Co-Founder, VSD, Swamy Irrinki, Sr. Director of Marketing, SiFive, Dr. Shafy Eltoukhy, SVP of Operations and GM of SoC Division, SiFive and Huzefa Cutlerywala, MD of Open-Silicon India.
The events were hosted to spread awareness for RISC-V, an open instruction set architecture that has stirred a revolution in the industry and is rapidly increasing its ecosystem. It is being preferred by leading system, chip design organizations, several start-ups and governments around the world. The tech symposium in New Delhi enabled industry experts, students and engineers to share their thoughts on RISC-V ecosystem and understand the role of RISC-V to develop indigenous processors for control and security by national Government, and current research being conducted at Indian educational institutes and research organizations. The esteemed speakers used the platform to discuss the nuances of Hardware Designing and Designing complex RISC -V SoCs.
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