TSMC taped out its first chip in a process making limited use of extreme ultraviolet lithography and will start risk production in April on a 5-nm node with full EUV. Separately, the foundry forged partnerships with four partners to support online services for back-end chip design. The foundry’s update showed that area and power gains continue in its leading-edge nodes, but chip speeds are no longer advancing at their historic rate. To compensate, TSMC gave an update on a half-dozen packaging techniques that it is developing to speed connections between chips. TSMC expects that other EDA vendors will eventually join the effort that also will come to include front-end design flows. To test out the capabilities, TSMC is designing its N5 SRAM using the service. In addition, Synopsys used it to tape out a PCIe Gen 5 PHY block in TSMC’s 7-nm node, and startup SiFive used it to design a 28-nm RISC-V core. To read more, please visit: https://www.eetasia.com/news/article/18100502-tsmc-to-start-5nm-production-in-april.]]>