SiFive announced a new line of RISC-V based, octa-core SiFive Core IP 7 Series cores, including the Linux-friendly U74 and U74-MC, a variant that provides 64-bit addressability for real-time, latency sensitivity.
SiFive has launched its second generation of chip designs that use the open source RISC-V architecture, including two new Linux-ready U7 models. SiFive’s new U7 core designs follow its similarly Linux-compatible, 64-bit U5 series cores used in its Freedom U540 a quad-core, 1.5GHz RISC-V SoC. The U540 powered SiFive’s open spec HiFive Unleashed SBC.
As RISC-V chips, the designs are open source and customizable. RISC-V also offers the advantages over Arm and x86 such as being up-to-date, purpose built, and unburdened with legacy code.
To read more, please visit: http://linuxgizmos.com/sifive-unveils-octa-core-risc-v-designs-including-two-linux-ready-models/.
Stay Connected With RISC-V
We send occasional news about RISC-V technical progress, news, and events.
Copyright © 2023 RISC-V International®. All rights reserved. RISC-V, RISC-V International, and the RISC-V logos are trademarks of RISC-V International. For trademark usage guidelines, please see our Brand Guidelines and Privacy Policy