Electronics Weekly Article: UltraSoc Lockstep Monitor Checks Cores

UltraSoC has launched the UltraSoC Lockstep Monitor. UltraSoC’s flexible IP supports all common lockstep / redundancy architectures, including full dual-redundant lockstep, split/lock, master/checker, and voting with any number of cores or subsystems.
The UltraSoC Lockstep Monitor can support any processor architecture or other subsystem, including custom logic or accelerators. Lockstep operation is needed for safety standards such as ISO26262 for automotive, IEC 61508, EN50126/8/9 and CE 402/2013. The new Lockstep Monitor consists of a set of configurable semiconductor IP (SIP) blocks that are protocol aware and can be used to cross-check outputs, bus transactions, code execution and even register states, between two or more redundant systems.
It can be used with any processor architecture, including those – such as the emerging RISC-V architecture – which lack native support for lockstep configurations. In addition to traditional processor cores, it can also check other subsystems or accelerators.
 
To read more, please visit: https://www.electronicsweekly.com/news/business/ultrasoc-lockstep-monitor-checks-cores-2018-11/.