Imperas Software Ltd., the leader in virtual platforms and high-performance software simulation, today announced the RISC-V Open Virtual Platform Simulator (riscvOVPsim™) as a reference Instruction Set Simulator (ISS), including open source model, specifically for the RISC-V community of software developers, implementers and early adopters.
riscvOVPsim is a free RISC-V simulator and model of a complete single-core RISC-V CPU, delivering commercial high-level simulation performance and quality for development and compliance testing.
- Jump starts software development prior to broad availability of silicon devices and development boards.
- Enables early stage implementation testing, and Design Verification (DV) of RISC-V CPU core designs.
- Assists compliance by providing a reference for compliance test development.
To read more, please visit: http://www.imperas.com/articles/imperas-empowers-riscv-community-with-riscvovpsim.