For chip architects and designers today, “the ISA” in RISC-V is a small consideration. The concern isn’t even choosing “the core.” Designers today are faced by a “whole system” problem—a problem of systemic complexity.
That fact is implicit in the picture that I show people to explain the UltraSoC embedded analytics architecture. It shows a block-level representation of an SoC, with a broad range of compute nodes, memory and custom logic, interconnected by a NoC. One of those compute blocks is a RISC-V processor. It’s an important component, but it’s one among many. RISC-V is going to be used alongside other architectures for the foreseeable future, and probably forever.
To read more, please visit: https://semiengineering.com/beyond-the-risc-v-isa/.