Western Digital has officially released the source code for its SweRV RISC-V core, under the permissive Apache 2.0 Licence, allowing anyone to run, experiment with, or modify its implementation. Announced back in December, SweRV is a RISC-V core implementation developed in-house as part of Western Digital’s aim to transition its storage processing products away from proprietary cores and onto the free and open instruction set architecture (ISA). “Our SweRV Core and the new cache coherency fabric initiative demonstrate the significant possibilities that can be realized by bringing data closer to processing power,” claimed WD chief technology officer Martin Fink at the time. “These planned contributions to the open-source community and continued commitment of the RISC-V initiative offer exciting potential to accelerate collaborative innovation and data-driven discoveries.” To read more, please visit: https://abopen.com/news/western-digital-releases-swerv-risc-v-core-source-code/.]]>