China Times Article: Andes Custom Extension Makes The Efficient RISC-V Processor Further Enhanced

Andes Technology announced that the newly released AndeStar V5 CPU processor cores N25/N25F, NX25/NX25F, A25 and AX25 will have the Andes Custom Extension (ACE) function. Andes Technology will develop the embedded processor IP with more than ten years of experience combined with RISC-V technology, launching AndeStarV5 architecture, and now further ACE, making it easier for embedded system engineers to add add custom instructions to the Andes Technology V5 processor .
RISC-V is an open source instruction set architecture (ISA) developed by the non-profit RISC-V Foundation. Because RISC-V has the advantages of streamlining, modularization and scalability, it has recently emerged in various important application fields. In addition to the general functions, the RISC-V specification reserves space for the custom instruction set to facilitate the addition of Domain-Specific Architecture/Acceleration (DSA) extensions to support applications such as artificial intelligence/machine learning, amplification and virtual reality (AR). /VR), Advanced Driver Assistance Systems (ADAS) and new generation storage and networking designs.
 
To read more, please visit: https://www.chinatimes.com/realtimenews/20190118001706-260412. Please note that the original article is in Chinese.