Andes Technology Corp. Targets Deeply Embedded Protocol Processing And Entry-Level MCUs With The New N22, The Smallest RISC-V Core In Its V5 Family

Andes Technology Corporation, a leading supplier of small, low-power, high performance 32-/64-bit embedded CPU cores, including a broad family of RISC-V processors, announces the new N22 32-bit RISC-V CPU core to target deeply embedded protocol processing such as high-speed communication and storage, and entry-level MCU applications such as small IoT and wearable devices. The highly configurable N22 is the smallest in the Andes RISC-V family offerings in just 15K gates with minimum useful configuration settings, and yet delivers over 750MHz at 28nm in the worst case. In addition, the N22 provides an impressive 3.93 Coremark/MHz, highly flexible system and memory interfaces and vector interrupt controller. In addition, a low pin count two-wire debug module can save SoC chip cost, and a pre-integrated MCU platform with frequently used peripherals can help speedup construction of various SoCs.
“CPU cores to serve today’s high-speed communications and storage markets must be able to do more than run at a high data rate,” declares Andes Technology President Frankwell Jyh-Ming Lin. “The protocol SoCs serving these markets are highly complex to meet widely diverse applications.  As a result, SoCs need to offer not only high bandwidth processing to accommodate the data rate, but also software based flexibility when new standards and protocols are adopted by the industry standards groups in these markets.  Furthermore, silicon costs dictate ultra-small gate counts to serve anywhere within the SoC design, esp. when dozens of instances are needed. The N22’s high performance and compact design makes it very suitable to process on-the-fly protocol packets at high data-rate. ”
 
To read more, please visit: https://globenewswire.com/news-release/2019/02/12/1720572/0/en/Andes-Technology-Corp-Targets-Deeply-Embedded-Protocol-Processing-and-Entry-level-MCUs-With-the-New-N22-the-Smallest-RISC-V-Core-in-its-V5-Family.html.