EE Times Japan Article: RISC-V Interest Is High But Presents A Barrier To Popularization

RISC-V has now established a foothold as a deeply integrated controller for SoCs. So then, the question is “Is this open source ISA (Instruction Set Architecture) a huge leap to replace Arm and x86 as a host processor?”
The simple answer is “yes”. However, it will take several years before, and various barriers will be awaiting. The free open source community behind RISC – V will need to develop and comply with a wide variety of system – level standards.
NVIDIA and Western Digital are currently planning to install a RISC-V controller on their SoCs, and Microsemi will also be adopted in a new FPGA. Andes, Cortus and SiFive are working on selling IP (Intellectual Property) cores and several startups are planning to develop machine learning accelerators using their IP cores.
RISC-V is used in China, about 20 million fitness bands and smartwatches. In the United States, SiFive has shipped more than 2,500 development boards using processors and plans to sell it as an IP core or to sell it as SoC via design services.
 
To read more, please visit: https://eetimes.jp/ee/articles/1902/18/news075.html. Please note that the original article is in Japanese.