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OneSpin Launches First Formal RISC-V Integrity Verification Solution

By February 21, 2019May 12th, 2021No Comments

OneSpin Solutions, provider of innovative verification solutions for highly reliable, digital integrated circuits (ICs), today unleashed its RISC-V Integrity Verification Solution for development and assessment of RISC-V cores, leveraging its advanced formal verification expertise for automotive and other high-integrity processor applications.
The RISC-V Integrity Verification Solution, based on the RISC-V instruction set architecture (ISA) formalized in a set of SystemVerilog Assertions (SVA), is delivered as a series of formal applications (Apps) and integrated into an exhaustive verification framework. The Solution verifies compliance for the open standard RISC-V ISA is met, critical for both IP core suppliers and their customers. It also verifies that cores do not contain hardware Trojans or other unintended functionality to ensure trust and security.
“Even though past efforts have failed to achieve 100 percent proof, verification of an instruction set architecture’s conformance is a natural fit for formal technology,” remarks Sven Beyer, OneSpin’s product manager for design verification. “Our RISC-V integrity Verification Solution converges for all properties on real-world implementations, a valuable resource to the many users trying to meet this processor standard.”
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