At first glance, the idea of freely-shared intellectual property (IP) would appear to contradict the fundamental principles of a competitive, market-driven economy. Open standards that enable interoperability between competing products are acknowledged as tools for building larger markets, but tightly-held IP and proprietary knowledge have been considered the key ingredients for innovation and success in technology based markets from the steam age onward (see box: ‘Open Standards vs Open Source’ for details).This has begun to change over the past two or three decades, as the growing complexity of many technologies has given rise to several trends that threatened to slow the pace of innovation and market evolution.
Although FPGAs are excellent solutions for certain applications, they are slower, more power hungry and significantly more expensive than an equivalent single-purpose silicon device. Until recently, nearly all ‘hard’ silicon designs were based on proprietary IP, either developed in-house or licensed from a third party vendor. The cost and time required to develop a reliable, high-performance processor architecture meant that nearly all ICs that require a processor core use third-party IP, licensed from a handful of vendors such as ARC, ARM, MIPS and Qualcomm. These cores offer excellent technical support, optional architectural enhancements, and deep libraries of application code, but the IP tends to be very costly to license and usually has significant restrictions on how it can be modified.
As a result, the same market pressures that created open source software and hardware are giving rise to the first generation of open source silicon projects. Among the most ambitious and successful of these efforts is the RISC-V project, an open instruction set architecture (ISA), originally developed at the University of California at Berkeley, and currently supported by the RISC-V Foundation (https://riscv.org/).
Like most modern ISAs, it is based on reduced instruction set computing (RISC) principles that provide a good balance between silicon footprint, execution speed and code efficiency. The instruction set can be instantiated with a 32-, 64-, or 128-bit word width and has been designed to efficiently support a wide variety of common applications. Unlike proprietary ISAs, the RISC-V ISA may be freely used for any purpose, enabling anyone to design, produce or sell RISC-V chips and software.
To read more, please visit: https://opensourceforu.com/2019/02/how-open-source-technologies-accelerate-innovation/.