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VDC Research Article: 5 Key Takeaways From The RISC-V Roadshow In Boston

By April 3, 2019May 12th, 2021No Comments

Dan Mandell from VDC Research shared his perspective after the RISC-V one-day event in Boston:
The RISC-V Roadshow made its way to the Boston area yesterday, featuring a number of live demonstrations and presentations from RISC-V Foundation members. A variety of companies are participating in the North America leg of the trip, including Andes Technology, Antmicro, Dover Microsystems, Hex Five, Imperas Software, Microchip Technology, SiFive, and Western Digital. The RISC-V open-source hardware instruction set architecture has generated considerable backing in the past 18 months and now comprises more than 235 member organizations creating a collaborative community of hardware and software providers. At the event, several important themes highlighted the growing traction behind RISC-V for IoT and embedded engineering projects.
1. Open Source Opens a Lot of Doors
One of the greatest appeals of the RISC-V ISA is that it is open source and has grown a strong ecosystem for support worldwide. The RISC-V Foundation has established several groups for support (technical, marketing, education, etc.) and members have the ability to drive standards and set direction on future specifications. RISC-V is also bridging partnerships with other open source organizations, such as the Linux Foundation, to leverage their services and support. In general, the openness of the RISC-V ISA offers a lot of flexibility and configurability for the development of a wide range of computing solutions.
2. Simple is Sweet
The simplicity of RISC-V cores today enables developers to have greater control over embedded hardware development. Other architectures are rich in features but not all of those features are necessary for many applications placing needless overhead on the system. Compared to established ISAs, relatively simple RISC-V processor cores feature generally lower power consumption while enabling more configurability for microarchitectures such as for hardware control of memory.
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