CNX Software Article: Linux 5.1 Release – Main Changes, Arm, MIPS And RISC-V Architectures

A handful of cleanups to our kernel prints, most of which are things I should have caught the first time.

We now provide an HWCAP that contains the ISA extensions that all enabled processors support, as supposed to just looking at the first enabled processor.

We no longer spin forever waiting for all harts to boot.

A fixmap implementation, which is coupled to some cleanups in our MM code.

  To read more, please visit: https://www.cnx-software.com/2019/05/06/linux-5-1-changelog-arm-mips-risc-v/.]]>