OneSpin tool suite for RISC-V Integrity Verification. The app provides the growing RISC-V community with a way to verify processor cores to ensure that no errors go unnoticed in the design and integration of RISC-V cores, and that they are fully compliant with the instruction set architecture. (ISA) is given. Providers of RISC V cores can better compete with older, established instruction set architectures through verification. It only takes a week to set up the app, and verification of a complete RISC-V core takes two hours. By comparison, other verification concepts can take months to set up a simulation, followed by weeks of regression testing that still allows critical errors to go undetected. Formal methods use only partial proofs, so they can not detect all hidden functions and thus result in an incomplete verification. To read more, please visit: https://www.elektroniknet.de/elektronik/halbleiter/risc-v-prozessorkerne-auf-konformitaet-testen-165792.html. Please note that the original article is in German.]]>