EE Times Article: RISC-V Moving Beyond Academia, New Group Offers Hardened SoCs

Over the last year or so, we’ve heard many times that ‘this is the moment for RISC-V.’ This week, I attended the RISC-V workshop in Zurich to get an idea of where it really is at right now. The conclusion: while there is still a lot of background work to be done for RISC-V to go mainstream, the signs are that all the triggers to make it happen are now gradually being released.
The biggest challenge is that RISC-V is still perceived as a hobbyist architecture, and this makes it difficult for mainstream companies to adopt, unless it has deep ecosystem support. It’s not enough to have a cool or disruptive technology. Designers need to provide assurances to their customers that a chip or system fits into their existing design flow and toolchains and can be supported, wherever in the world it may be.
This is why the recently appointed CEO of the RISC-V Foundation, Calista Redmond, said at the workshop here in Zurich, “We need to move this past a hobby.” Around 250 or so workshop attendees from both industry and academia, including representatives from Arm, Google, Huawei, NXP, Samsung and STMicroelectronics, listened to a ‘state of the union’ on the architecture, software, tools, debug, verification, and security, as well as numerous ongoing projects and community initiatives.
 
To read more, please visit: https://www.eetimes.com/document.asp?doc_id=1334814