Semiconductor Engineering Article: Week In Review: Design, Low Power

Western Digital, PlatformIO Labs, and SiFive teamed up to extend the PlatformIO vendor-agnostic embedded development platform to include new tools to provide an end-to-end, open environment, including development for RISC-V. “By teaming up with PlatformIO, we are bringing the entirety of its multi-architecture embedded design environment, including debug and trace, to the open-source community. With deep libraries and automated support already built-in, this will allow programmers to easily transition among development platforms, including RISC-V,” said Martin Fink, chief technology officer, Western Digital. The collaboration allows software programmers developing for RISC-V and other architectures to use PlatformIO’s previously paid PlatformIO Plus features at no cost. Western Digital also updated its open-source RISC-V SweRV Core, adding faster divide and fetch functions, the incorporation of I/O timing control, better error correction capabilities, and multi-core debug improvements, as well as updates to its OmniXtend cache-coherent fabric.
 
To read more, please visit: https://semiengineering.com/week-in-review-design-low-power-48/