ETH Zurich has developed for floating-point arithmetic. With 260 Gflops / W, the chip implemented in 22nm FD-SOI offers unmatched energy efficiency and beats every competitor by far. Eight NTX units are controlled by an RV32IMC RISC V-Core, which provides full software flexibility. A key feature is a focus on eliminating the bottleneck common to Neumann architectures by amortizing RISC-V instructions across eight NTX units and removing all FP load/store operations from the instruction stream through the AGUs. To read more, please visit https://www.elektroniknet.de/elektronik/halbleiter/eth-zuerich-hebt-gleitkomma-arithmetik-auf-neue-stufe-168457.html. Please note that the original article is in German.]]>