High-Bandwidth Accelerator Access to Memory: Enabling Optimized Data Transfers with RISC-V | Shubu Mukherjee, SiFive

SoCs based on RISC-V offer a unique opportunity to optimize high-bandwidth data transfers between a DSA and memory. DSAs often need to transfer their data to memory, such as DDR, LPDDR or HBM memories. Often this is accomplished using a DMA (Direct Memory Access) engine.
article: https://www.sifive.com/blog/high-bandwidth-accelerator-access-to-memory-enabling-optimized-data-transfers-with-risc-v