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Open source hardware based on RISC-V processor designs has a bit of drift compared to its software counterpart: The framework freezes instruction set architecture (ISA) as a durable long-term component. Here, ISA is the vocabulary that processors understand, so software is written in that vocabulary. How software is coded in that language tells the processor what to do.

Anyone can take the RISC-V ISA and design other aspects such as extensions. What’s the hardware approach has in common with open source software is that RISC-V is free of IP entanglements, and participants can share the results of their design efforts.

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