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Video: #CSWSpring21 / RISC-V for acceleration of data-parallel workloads: from IoT to HPC
In this talk by Luca Benini (University of Bologna / ETH Zurich), we will look into RISC-V based architectures for acceleration of data-parallel workloads. The focus will be on how we can exploit the flexibility of the ISA and the freedom it gives in architectural design to create efficient but flexible accelerators for a range of applications, from the IoT to the datacenter.

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