Skip to main content

Read the full paper.

Abstract: Polynomial multiplication is a core operation for public key
cryptography, such as pre-quantum cryptography (e.g. elliptic curve cryptography) and post-quantum cryptography (e.g. code-based cryptography and multivariate-based cryptography). For this reason, the efficient
and secure implementation of polynomial multiplication has been actively conducted for high availability and security level in application
services. In this paper, we present all polynomial multiplication methods
on modern 32-bit RISC-V processors. We re-designed expensive implementations of polynomial multiplication on legacy microcontrollers (e.g.
8-bit AVR, 16-bit MSP, and 32-bit ARM) for new instruction sets of 32-
bit RISC-V processors. Secondly, we suggest the optimal operand length
for each polynomial multiplication on 32-bit RISC-V processors. With
this implementation technique and Karatsuba algorithm, we achieved
scalable features, which ensures the polynomial multiplication in any
operand lengths with reasonably fast performance. Third, we propose
instruction set extensions for the optimal implementation of polynomial
multiplication on 32-bit RISC-V processors. This new feature introduces
significant performance enhancements. Lastly, the proposed implementation is a public domain and following researchers can easily re-produce
the result.

Stay Connected With RISC-V

We send occasional news about RISC-V technical progress, news, and events.