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When choosing a processor for space computing, there are many factors that come into play: because of the rigors of a harsh environment, developers must find the optimal balance between size, weight, power and cost. An important variable in this design is the processor architecture, which can have a significant impact on balancing performance and power consumption.

Students at the University of Pittsburgh’s NSF Center for Space, High-performance, and Resilient Computing (SHREC) examined the RISC-V architecture for space computing and presented their results at the 2021 IEEE Space Computing Conference. They were awarded the Best Paper Award for Research in Space Computing for their work.

Read  the full press release. 

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