Codasip, a supplier of customisable RISC-V processor IP and tools, has announced further enhancements to its Studio processor design toolset.
New features in Studio 9.1 include an expanded bus support with full AXI for high-performance designs, as well as improved support for LLVM and improved code density.
Studio looks to simplify the task of customising designs, enabling companies of all sizes to differentiate their products at the core. Launched in 2014 Studio simplifies processor customisation and helps designers through the steps necessary to create their custom RISC-V processor from a Codasip embedded or application core design – ensuring the design achieves predictable results and the highest possible levels of performance.