SiFive announced new, high performance RISCV cores as AMD is looking for RISCV architect? | René Rebe, Bits inside by René Rebe

Previous PostCFU Playground: Full-Stack Open-Source Framework for Tiny Machine Learning (tinyML) Acceleration on FPGAs | Shvetank Prakash∗, Tim Callahan† Joseph Bushagour§, Colby Banbury∗, Alan V. Green†, Pete Warden†, Tim Ansell†, Vijay Janapa Reddi∗, †Google §Purdue University ∗Harvard University