In a recent guest editorial here on EE Times, legendary professor David Patterson wrote about busting the five myths around the RISC-V instruction set architecture (ISA). At the recent RISC-V Summit organized by RISC-V International, the consortium that manages and promotes the RISC-V Instruction Set Architecture (ISA), its president, Calista Redmond, had a far more blunt message: RISC-V is inevitable.
In fact, she said, RISC-V will eventually have the best CPUs, the best software running on them and the best ecosystem of any microprocessor core family. These are mighty strong words for a nascent ISA that is only about 10 years old and that competes with the far more established Arm and x86 ISAs. It almost sounded like the Borg from Star Trek when they say, “Resistance is futile.”