Agile Analog, the customisable analog IP company, is launching the first complete analog IP subsystem for RISC-V applications at the RISC-V Summit Europe in Barcelona (5-9 June). The initial subsystem includes all the analog IP required for a typical battery-powered IoT system, including a power management unit (PMU), a sleep management unit (SMU), and data converters. This unique, process-agnostic, customisable and digitally wrapped analog IP subsystem will help solve many of the issues that System on Chip (SoC) designers currently encounter, as it pairs with a RISC-V core to form a complete solution.
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