Two relatively new players in the CPU world, Semidynamics and Signature IP, have announced multi-core RISC-V and CHI interconnect IP for compute-intensive applications like AI/ML.
As some experts predict the end of Moore’s law, the artificial intelligence and machine learning (AL/ML) industry needs to find ways to greatly increase computing power density and efficiency. Such gains call for monolithic multi-core and chiplet architectures and improved interconnects.
One of the newest announcements in the multi-core arena comes from a partnership between Semidynamics and Signature IP. The two intellectual property (IP) companies have created and tested a RISC-V multi-core environment and Coherent Hub Interface (CHI) interconnect for system-on-chip (SoC) developers.