Processor Akurra, modifies the standard RISC-V architecture and instruction set to support their memory allocation technology.
VyperCore, a UK-based startup located in Bristol, has achieved a significant milestone in the development of a new chip architecture that incorporates RISC-V. They have successfully demonstrated the RTL (Register-Transfer Level) design of this technology in a RISC-V processor simulation, executing code for the first time. They plan to release a hardware version of this technology by June 2024.