The EU-funded MEEP project introduced a large-scale field programmable gate array (FPGA) system involving a complete collection of hardware intellectual properties (IPs) and software components. These were seamlessly integrated into the FPGA-based system.
“MEEP isn’t just an infrastructure, it’s more than that,” states project coordinator Vanessa Fernandez, senior research project manager at the Barcelona Supercomputing Center (BSC). “It’s about the contributions to the RISC-V ecosystem in many of the layers of the open stack (software and hardware). It’s also about contributing to European chip sovereignty, to society and to economic growth by offering a set of reusable RISC-V-based IPs, tools and infrastructure.”