Semidynamics has announced an all-in-one unified IP solution that combines RISC-V, vector, tensor and its own Gazzillion technology to enable implementation of AI workloads using just one instruction set and one tool chain.
The company explained that AI chip designers currently tend to integrate separate IP blocks next to the system CPU to handle the ever-increasing demands of AI. This makes AI chip configuration inelegant with typically three different IP vendors and three tool chains, with poor PPA (power performance area) – and in turn it is increasingly hard to adapt to new algorithms.