XiangShan is a RISC-V CPU project out of China, and now hosted on Github. This is a high-performance CPU design, instead of lower performance designs that we have seen from others.
Please note that we are doing these live at Hot Chips 2024 this week, so please excuse typos.
Copyright © RISC-V International®. All rights reserved. RISC-V, RISC-V International, and the RISC-V logos are trademarks of RISC-V International.
For trademark usage guidelines, please see our Brand Guidelines and Privacy Policy. Code of Conduct Policy. Antitrust Policy.
