June 29-30, 2015
The International House, Berkeley, CA
About
The goals of this workshop are for the community to share information about recent activity in the various RISC-V projects underway around the globe, and to build consensus on future steps in the RISC-V project, including the RISC-V foundation. This workshop features talks and poster presentations conveying recent activity in the RISC-V community at large, collected during an open submission period.
Agenda
Monday, June 29, 2015
Time | Event | Speaker (Affiliation) | Media |
8:00am | Breakfast | ||
9:00am | Introductions and Welcome | Krste Asanović (UC Berkeley) | Slides | Video |
10:00am | An update on lowRISC: an open-source RISC-V SoC platform | Alex Bradbury and Robert Mullins (lowRISC) | Slides | Video |
10:15am | SHAKTI Processors (invited, speakers unable to attend) | Rahul Bodduna, Sireesh N, G S Madhusudan and Kamakoti Veezhinathan (IIT Madras) | N/A |
10:30am | Break | ||
11:00am | Compressed Extension Proposal | David Patterson (UC Berkeley) | Slides | Video |
11:15am | GoblinCore64: A RISC-V Extension for Data Intensive Computing | John Leidel, Xi Wang, and Yong Chen (Texas Tech University) | Slides | Video |
11:30am | Vector Extension Proposal | Krste Asanović (UC Berkeley) | Slides | Video |
12:00pm | Privileged Architecture Proposal | Andrew Waterman (UC Berkeley) | Slides | Video |
12:30pm | Lunch | ||
2:00pm | RapidIO: the Unified Fabric for Performance-Critical Computing | Rick O’Connor (RapidIO Association) | Slides | Video |
2:30pm | CAVA: Cluster in a Rack | Peter Hsu (Oracle) | Slides | Video |
3:00pm | Breakout Sessions/Labs/Birds of a Feather | ||
4:45pm | Break | ||
5:00pm | Poster Previews | Video | |
6:00pm | Buffet Dinner/Reception | ||
7:00pm | Poster Session and Demos |
Tuesday, June 30, 2015
Time | Event | Speaker (Affiliation) | Media |
8:00am | Breakfast | ||
9:00am | Z-scale: Tiny 32-bit RISC-V Systems | Yunsup Lee (UC Berkeley) | Slides | Video |
9:30am | BOOM: Berkeley Out-of-order-Machine | Chris Celio (UC Berkeley) | Slides | Video |
10:00am | FabScalar-RISC-V | Rangeen Basu Roy Chowdhury, Anil Kumar Kannepalli and Eric Rotenberg (NCSU) |
Slides | Video |
10:30am | Break/Photo | Photo | |
11:00am | RISC-V(img/workshop-jun2015-group.jpgerification) | Nirav Dave and Prashanth Mundkur (SRI International) | Slides | Video |
11:30am | Aristotle – A Logically Determined (Clockless) RISC-V RV32I | Matthew Kim and Karl Fant (RMIT University) | Slides | Video |
11:45am | Towards General-Purpose Tagged Memory | Wei Song, Alex Bradbury and Robert Mullins (lowRISC, University of Cambridge) |
Slides | Video |
12:00pm | Raven3: 28nm RISC-V Vector Processor with On-Chip DC/DC Convertors | Brian Zimmer and Yunsup Lee (UC Berkeley) | Slides | Video |
12:15pm | Evaluating RISC-V Cores for PULP: An Open Parallel Ultra-Low-Power Platform | Sven Stucki, Antonio Pullini, Michael Gautschi, Frank Kagan Gürkaynak, Andrea Marongiu, Igor Loi, Davide Rossi and Luca Benini (ETH Zurich, University of Bologna) |
Slides | Video |
12:30pm | Lunch | ||
2:00pm | Feedback Session | ||
3:15pm | Breakout Sessions/Labs | ||
5:00pm | End of Workshop |
Logistics
Participants are responsible for making their own travel and hotel arrangements. The links below provide information on directions, parking and nearby accommodations. If you have any questions, feel free to send an email to aspire-admin@eecs.berkeley.edu.
Nearest Airports: Oakland International Airport and San Francisco International Airport.
Nearby Hotels (with walking directions to I-House): https://aspire.eecs.berkeley.edu/915-2/
Directions, Parking, and Public Transportation): http://ihouse.berkeley.edu/about/location.php.
Campus Map (with I-House location): http://www.berkeley.edu/map