At this year’s Design Automation Conference (DAC), I was told that the committee had received some 1,500 technical paper and presentation submissions, and a 34% increase in research paper submissions,…
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This week, the 2024 edition of RISC-V Summit Europe took place in lovely Munich, Germany. Those of us who attended last year’s edition in Barcelona might not have expected the…
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Munich, Germany. SiFive, Inc. announced an innovative design of its SiFive Essential product family at the RISC-V Summit Europe 2024. With over a decade of development, the Essential IP has demonstrated…
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Semidynamics Tensor Unit efficiency data for its “All-In-One” AI IP, which uses a LlaMA-2 7B-parameter Large Language Model (LLM), has been made public. Roger Espasa, Semidynamics’ CEO, explained, “The traditional…
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SAN DIEGO, June 25, 2024 /PRNewswire/ -- X-Silicon is demonstrating the 1st Vulkan™ Software Rendering Platform capability running on the RISC-V Architecture. This opens up a new segment of low-power…
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As RISC-V gains traction as an open-source alternative to Arm, several companies have announced partnerships and research to bolster the ISA. Forecasts show that AI will continue to fuel RISC-V…
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The IAR safety-certified C-STAT tool is now available in the Functional Safety editions of IAR Embedded Workbench for RISC-V, ARM, and Renesas RL78 architectures. The latest IAR Embedded Workbench for…
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Today, RISC-V pioneer DeepComputing announced that their first RISC-V Mainboard, compatible with the Framework Laptop 13, is about to be released. Sporting a RISC-V StarFive JH7110 SoC, this groundbreaking Mainboard was…
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Alexander Conklin, Head of Hardware Engineering, Rain AI The compute intensive demands of AI workloads have given rise to a new era in accelerator design. In this talk we’ll take…
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LONDON, June 13, 2024 (GLOBE NEWSWIRE) -- Axiomise, a company noted for enabling formal verification adoption, is headed to the RISC-V Summit Europe to demonstrate formalISA, its automated formal RISC-V…
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