According to Wayne Williams at TechRadar, a startup called XCENA has unveiled the MX1 chip featuring thousands of custom RISC‑V cores, leveraging CXL 3.2 and PCIe Gen6 to bring compute closer to DRAM. This “near-data-processing” architecture promises significant reductions in data transfer bottlenecks and energy use in servers. It supports massive memory expansion, compression, and reliability features, signalling a shift in how server platforms might be designed.
