Featured Work Archives

Jul 07

RISC-V Edge Inference for Real-Time Eye-Movement Control on GAPses Smart Glasses

By RISC-V International Staff Featured Work

Project Snapshot This live demonstration showcases GAPses, an ultra-low-power smart-glasses platform based on an ultra-low power RISC-V multicore processor (GAP9), enabling always-on, real-time, energy-efficient edge processing of electrooculography (EOG) and…

Apr 28

Docker on RISC-V: From Release to Production in 6 Days

By RISC-V International Staff Featured Work

Project Snapshot Community-maintained Docker packages bring v29 to RISC-V64 within days of official release, not months. Fully automated pipelines compile natively on RISC-V hardware, delivering Docker Engine, CLI, Compose, and…

Mar 24

Using a Performance Model to Implement a Superscalar CVA6

By RISC-V International Staff Featured Work

Project Snapshot How does performance modeling accelerate real hardware innovation in open RISC-V designs? In this paper, Thales demonstrates a performance model of the CVA6 RISC-V processor, built to evaluate…

Feb 17

Support RAJA and Scientific Applications on RVV Architectures

By RISC-V International Staff Featured Work

Project Snapshot In this work, we aim to make RVV more accessible to scientific applications by integrating it into the RAJA performance-portability framework. RAJA is a C++ library primarily developed…

Jan 27

How We’re Using AI to Streamline RISC-V Regression Debugging

By RISC-V International Staff Featured Work

AI verification startup Verifaix explains how its AI Debug Agent automates regression debugging, helping RISC-V developers reduce manual verification effort and accelerate design cycles.

Dec 10

Ocelot3: Full Vector “V” Extension for BOOM

By RISC-V International Staff Featured Work

Project Snapshot Ocelot is an open-source project that enables vector support for the BOOM core. In this generation, we achieve full RVV 1.0 support. The decoupled VPU is connected through…

Nov 25

Enabling High Performance RISC-V Software for AI in the Real World

By RISC-V International Staff Featured Work

Embecosm used the oneAPI Construction Kit to explore accelerating PyTorch using RISC-V cores, trying over a thousand in emulation and some on an FPGA. This case study shows how the…

Oct 16

Optimizing Hardware for Neural Network Inference using Virtual Prototypes

By RISC-V International Staff Featured Work

Project Snapshot Identifying the optimal hardware configuration for running NN inference on edge devices is critical for maximizing performance. Tailoring HW designs to specific applications significantly increases resource utilization. We…

Sep 30

A RISC-V Based Accelerator for Post Quantum Cryptography

By RISC-V International Staff Featured Work

Project Snapshot Post-Quantum Cryptography (PQC) is a topic of increased interest in the past decade, both with regards to the cryptosystem definition and the hardware and software implementations to perform…

Aug 26

CVA6 RISC-V PMP Vulnerabilities against FIA

By RISC-V International Staff Featured Work

Project Snapshot Fault Injection Attacks (FIA) present considerable threats to the security and reliability of embedded systems. FIAs can compromise an embedded processor by altering its clock signal, power supply…

Featured Work

RISC-V Edge Inference for Real-Time Eye-Movement Control on GAPses Smart Glasses

Docker on RISC-V: From Release to Production in 6 Days

Using a Performance Model to Implement a Superscalar CVA6

Support RAJA and Scientific Applications on RVV Architectures

How We’re Using AI to Streamline RISC-V Regression Debugging

Ocelot3: Full Vector “V” Extension for BOOM

Enabling High Performance RISC-V Software for AI in the Real World

Optimizing Hardware for Neural Network Inference using Virtual Prototypes

A RISC-V Based Accelerator for Post Quantum Cryptography

CVA6 RISC-V PMP Vulnerabilities against FIA

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About

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Join RISC-V International

Becoming a member of RISC-V International allows companies and individuals to actively influence the development of an open, royalty-free instruction set architecture, driving innovation in custom processor designs.