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RISC-V ratifies compressed instruction extensions

By May 4, 2023No Comments1 min read
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RISC-V has ratified its extensions for code compression to reduce the memory requirements when using the open instruction set architecture.

This is particularly important for microcontrollers that have limited memory storage, allowing more complex code to be developed and run by mixing the new 16bit instructions with existing 32bit instructions.

Read the full article here.