Skip to main content
Blog

RISC-V SoC Design Workshop by Maven Silicon in Malaysia & Singapore

By August 27, 2024No Comments

Maven Silicon’s Founder and CEO P R Sivakumar, and Principal Engineer Satish Putta are delivering a 3 days workshop on ‘RISC-V SoC Design’ in Malaysia and Singapore.  

The RISC-V Processor is becoming very popular and powerful, like the open-source operating system Linux, as it’s based on the RISC-V open ISA [Instruction Set Architecture], which is open and license-free. In this AI era, chip designers are empowered with open computing solutions like RISC-V Open ISA to design powerful AI chips using various processors and accelerators. As RISC-V Open ISA democratizes processor design, chip designers can now dream of independently creating their processors and chips with their innovations. So, it’s the right time for the chip designers to explore RISC-V ISA and how to design System-On-a-Chip(SoC) using a RISC-V processor.  

In this workshop, the participants will learn how to design and implement an embedded microcontroller(SoC) using a RISC-V processor. The participants will understand how the RISC-V Processor/ISA differs from other proprietary Processors/ISAs, how to design and verify the processor, and then, finally, how to design an embedded microcontroller using a RISC-V processor. 

Dates: 25th, 26th & 27th Sept’24

Venue: Holiday Inn, Singapore Orchard City Centre, Singapore

Dates: 30th Sept, 1st & 2nd  Oct’24

Venue: Amari Spice Hotel, Penang, Malaysia

Please feel free to contact Sonu Kumar Singh, Manager-Corporate Business, Maven Silicon at sonu@maven-silicon.com to register for the workshop and avail brochures.

Stay Connected With RISC-V

We send occasional news about RISC-V technical progress, news, and events.