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[VIDEO] Accelerating RISC-V testbench development with open source RISC-V RTL and emulation

By September 24, 2024No Comments1 min read
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  • Marketing Specialist, RISC-V International

    Anisha is part of the RISC-V International marketing team, responsible for managing social media and tracking the latest updates from our members. She brings more than seven years of experience in digital marketing and communications strategy to the team.


Today’s shorter product time to market makes silicon verification runway shorter. Tenstorrent is working on CPUs based on RISC-V architecture for many AI applications. Since this is an emerging processor environment having RTL ready is not an easy task. Once RTL is available the testbench should be ready for both simulation and emulation workloads. Also, we should have all test collaterals ready to go, which involves firmware, drivers, applications etc.