Check out all the impressive talks and co-located events Next week, from August 21-23, more than 1,300 attendees will gather at the Huanglong Hotel in Hangzhou, Zhejiang, for the RISC-V…
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The Raspberry Pi people have released a new microcontroller board the Raspberry Pi Pico 2. However the star of the show is the new microcontroller chip, the RP2350. It upgrades…
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Raspberry Pi has stepped up its chip development with a quad core microcontroller with two ARM Cortex-M33 cores and two in-house RISC-V cores. The $5 Raspberry Pi Pico 2 board…
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By: Barry Kavanagh, Chief Executive Officer, O.C.E. Technology Ltd. Polarfire® SoC FPGA RISC-V space applications can now take advantage of an RTOS compliant to ESA standards and designed to police…
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The PolarFire SoC was the world’s first Linux-enabled mass market multi-core RISC-V SoC, originally made available pre-silicon by Microchip through Antmicro’s Renode simulation framework. Thanks to the ongoing collaboration between…
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Nirav & Hyelim sit down at Framework HQ SF to talk about all things RISC-V and DeepComputing. RISC-V Mainboard: https://frame.work/products/deep-comp... Read the blog post: https://frame.work/blog/introducing-a... Watch the full video.
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Canonical has announced another new entry in its growing list of RISC-V platforms for which an official Ubuntu Linux image is available, launching an image for Microchip's new PIC64GX family…
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By: Antmicro The openness and customizability of the RISC-V ISA has encouraged its use across a variety of scenarios, such as supporting cores in larger systems, standalone embedded MCUs and…
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FROM SIMPLE MICROCONTROLLERS TO COMPLEX MULTICORE SOCS RISC-V cores can be found in increasingly more chips, either as the main CPU(s) or as a companion core together with other CPU…
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