RPC DRAM support in open source DRAM controller

Original content published October 28, 2020 on the Antmicro blog. The Internet of Things is one of the areas that is hugely benefiting from miniaturization of semiconductor technologies, as more computing power can be encapsulated into increasingly smaller devices. Shrinking in size and requiring less power, various devices – including AI-capable ones – are applied in ways that were not possible a few years ago. One of the new and exciting developments in this space is the emergence of RPC (reduced pin-count) DRAM – a small form factor memory, for which Antmicro has developed support in the open source memory controller, LiteDRAM. Our contribution, already made available on GitHub is being polished and undergoing final tests, and will be mainlined shortly.[/vc_column_text][vc_column_text]

What is RPC DRAM

Standard modern DRAM chips, with their small but not miniscule footprints and rather high I/O requirements, are impossible to use in space-constrained applications. By using a large number of pins in the device they connect to, they can also push the envelope of the device itself even more, requiring larger and more expensive packages of the FPGA or SoC used. And while many edge devices could easily do with a smaller amount (e.g. sub-1Gb) of RAM than what modern memory parts offer, it is impossible to cut a RAM chip in half and get less memory capacity. Well, at least until now – kind of. The so-called RPC (Reduced Pin Count) DRAM – a new technology from Etron – has the potential to profoundly impact the AI, IoT and VR/AR markets. It is a tiny memory chip family which can get as small as 1.96mm x 4.63mm, offering 256Mbits and high bandwidth (the same as DDR3) using only 10% of the DDR3 PCB area and only half of the SoC or FPGA pins that the DDR3 memory takes up. Its clock speed can go up to 1200MHz, with bandwidth of up to 4800 Mb/s.[/vc_column_text][image_with_animation image_url="23430" animation="Fade In" hover_animation="none" alignment="center" border_radius="none" box_shadow="none" image_loading="default" max_width="100%" max_width_mobile="default"][vc_column_text]RPC DRAM is ideal for space-constrained edge AI applications that locally process data such as video, audio or image, where, apart from space saving, low power consumption is critical. The small number of pins used by RPC DRAM leaves more available resources for other system functionalities, while the possibility of stacking multiple RPC DRAM chips on top of one another for further layout optimization makes the technology even more appealing. It also enables interesting scenarios like embedding in a chiplet-based SiP, or even bare-die integration with small FPGAs for a powerful, Linux-capable device. But to use the memory with FPGAs, you need to interface with it using a DRAM controller – and that is where our latest work with LiteDRAM comes in.[/vc_column_text][vc_column_text]

LiteDRAM and open source IP ecosystem

LiteDRAM is a configurable memory controller that is part of LiteX, an open source SoC builder that we are developing and using to design FPGA-based systems. By creating support for RPC DRAM in LiteDRAM we have enabled the miniscule memory to be added to products that we build and to the whole LiteX ecosystem. This enables our customer’s devices to run more compute-hungry applications or full-fledged operating systems such as Linux in dedicated SoCs created by Antmicro on demand. We use and contribute to LiteDRAM, LiteX and other open source IP to develop unique designs interfaced with DDR memories for high-bandwidth video and other data processing systems; and RPC DRAM support is just one example of the enablement work we are performing in the ecosystem. Combined with the exciting work related to open source we are performing as part of CHIPS Alliance, SkyWater PDK and the fantastic enregy catalyzed by the open RISC-V CPU architecture (which is an obvious candidate for combining with RPC RAM both in soft- and hard CPU contexts), future is looking bright for tiny, open, ML-capable systems.[/vc_column_text][vc_column_text]

Antmicro’s open source FPGA IP

We often use FPGAs to build a wide array of configurable systems for our customers, leveraging the flexibility and customizability that this technology offers. We create open source FPGA IPs that are reusable across various designs and platforms without any licensing restrictions imposed on our customers. Antmicro’s open source IP cores portfolio includes MIPI CSI, MIDI, PCIe, USB, Ethernet etc. The FPGA systems that we build consist of modern, vendor-neutral components that ensure future-proofness and give our clients full control over the product. Reach out to us at contact@antmicro.com if you’d like to get a specialized FPGA-based system performing complex tasks.[/vc_column_text][/vc_column][/vc_row]]]>