By Desi Banatao
CEO, MIPS
Over the last 50 years, we’ve seen incredible changes in the automotive industry. Who would have thought that our cars could run without gas? That they could park themselves? That we could talk to them (and they would reply)? The transformation we will see over the next decade will bring even more incredible changes as the industry moves towards automobiles that are more intelligent, capable, safe and sustainable.
To create our increasingly “software defined” automobiles that have sophisticated capabilities and a growing number of services, automotive designers today must build powerful, sophisticated computing platforms that support fast, reliable processing and high-speed communications within smaller footprints and constrained thermal envelopes.
This evolution is accelerating the adoption of RISC-V in automotive. With RISC-V, designers get a flexible, modern architecture supported by an increasingly broad ecosystem. Designers can leverage RISC-V in creating Systems-on-Chips (SoCs) for automotive applications that not only meet performance/cost/power requirements, but also have a high degree of code portability.
One of the key areas where we see adoption of RISC-V is in vehicle safety. Research firm Canalys predicts that by 2030, half of all automobiles on the road will have Advanced Driver-Assistance Systems (ADAS). For ADAS and autonomous vehicles, RISC-V CPUs can play a key role in creating highly efficient, high-performance systems.
Highly scalable CPUs like the new MIPS eVocore P8700 multiprocessor which offers coherent multi-cluster/multi-core/multi-threaded capabilities – are key in enabling today’s increasingly heterogeneous computing architectures. In addition, it’s critical that CPUs be designed with automotive safety features for ISO 26262, ASIL-B(D) and ASIL-D systems.
Mobileye is a leader in such automotive SoCs, having shipped over 100 million SoCs for automotive safety and vision systems. The company’s vision processors, in combination with its wide range of algorithms, support vehicle active safety applications including vehicle and pedestrian detection, lane departure warning, intelligent headlight control and traffic sign recognition. The company’s technology is now inside autonomous vehicles.
Mobileye recently announced it has adopted the MIPS P8700 RISC-V multiprocessor to power its newest EyeQ SoCs. This builds on each previous generation of Mobileye EyeQ SoCs which used MIPS CPUs based on the MIPS architecture. Now the companies are looking to a RISC-V future.
Another key area for RISC-V in automotive is in-vehicle infotainment, a market that is projected to grow from USD $20.8 billion in 2021 to USD $38.4 billion by 2027. Automotive infotainment is rapidly evolving with more sophisticated displays, additional connectivity including 5G, over-the-air updates, personalized consumer experiences and services such as gaming and on-demand entertainment.
To support this evolution, companies like Microchip are creating smart, connected and secure embedded control solutions like the company’s PIC32 microcontroller (MCU). The PIC32 uses hardware virtualization technology in MIPS CPUs to enable a single MCU to replace multiple controllers. MIPS is now bringing powerful features like hardware virtualization to RISC-V CPUs.
RISC-V can help designers create the high-performance, efficient solutions needed to support increasingly complex automotive systems. At the RISC-V Summit 2022, Google’s Director of Engineering Lars Bergstrom announced that Google will support RISC-V as a first level citizen. This support will help grow both the RISC-V ecosystem and the Android ecosystem to enable innovative new automotive infotainment solutions.
RISC-V is also an enabler for automotive communications systems. The demand for more high-speed communications capabilities in cars continues to grow, driving the design of more efficient in-car systems. MIPS CPUs with hardware multi-threading capability are at the heart of such systems, including in-car connectivity systems from Valens. In these systems, multi-threading enables high levels of efficiency for streamlined communications. It also provides ultra-low latency response time for high priority tasks, a key advantage for next-generation in-car communications.
MIPS’ RISC-V CPUs with multi-threaded, multi-core, multi-cluster scalability will enable customers to provide more efficient, faster in-car communications, building on top of the value provided by the open platform and code portability of RISC-V.
In the next decade, RISC-V will become an essential component of more and more in-car systems, including ADAS, autonomous technologies, in-vehicle infotainment, communications and more. These systems will continue to evolve as the industry marches towards cars that are safer, more sustainable and more autonomous. With MIPS RISC-V CPUs like the P8700, companies can create highly efficient, high-performance SoCs with a robust safety model, within the broad and growing RISC-V ecosystem.