On-Board Decision Making in Space with Deep Neural Networks and RISC-V Vector Processors
Stefano Di Mascio, Alessandra Menicucci, Eberhard Gill, Gianluca Furano and Claudio Monteleone
Abstract
The use of deep neural networks (DNNs) in terrestrial... Read more.
Canonical Launches Its First Official Ubuntu RISC-V Builds, for SiFive’s Unleashed and Unmatched | Gareth Halfacree, hackster.io
Partnership with SiFive aims to make Ubuntu the "reference OS for early adopters" of Linux on desktop-class RISC-V.
Canonical has confirmed official RISC-V support... Read more.
Canonical Announces Ubuntu Support For RISC-V | Steven Dickens, Futurum
Canonical announces Ubuntu operating system support for a new architecture, namely RISC-V. Working with RISC-V core IP designer and development board manufacturer,... Read more.
TII’s Secure Systems Research Centre Collaborates with Global Universities on RISC-V-Based Secure Flight Computer System
Technology Innovation Institute (TII), the applied research pillar of Abu Dhabi’s Advanced Technology Research Council (ATRC), today announced that its Secure... Read more.
Video: RISC-V Ubuntu, Benchmarks and Gaming on the HiFive Unmatched | Tired Technician
In this video we explore getting Ubuntu installed on the HiFive Unmatched. Then we have a little fun with some benchmarks, followed up by trying out a few games... Read more.
SiFive Collaborates with Imperas on Models of SiFive’s RISC-V Core IP Portfolio
Imperas Software Ltd.,the leader in virtual platforms and high-performance software simulation, today announced that SiFive, Inc., the industry leader in RISC-V... Read more.
Automotive Hardware Functional Safety (FuSa) Features: ISO 26262
In all critical applications like aircrafts, medical equipment and automobiles, there is a requirement for the systems to be reliable and safe. These requirements... Read more.
Ubuntu 20.04/21.04 64-bit RISC-V released for QEMU, HiFive boards | Jean-Luc Aufranc, CNXsoft
Let’s a lot of excitement around RISC-V open architecture, but a lot of work still needs to be done to bring the ecosystem to level with Arm or x86 architecture... Read more.
Linux 5.13 Release – Notable changes, Arm, MIPS and RISC-V architectures | Jean-Luc Aufranc, CNXsoft
So we had quite the calm week since rc7, and I see no reason to delay 5.13. The shortlog for the week is tiny, with just 88 non-merge commits (and a few of those... Read more.
Video: Pineapple – the 32-bit RISC-V CPU that you can make at home | Filip Szkandera
Pineapple is a homemade 32-bit RISC-V CPU, that I was working on for the past 2 years. It runs at 500 kHz, has 512 kB RAM & program memory. VGA output is black... Read more.