Imperas unifies new RISC-V verification ecosystem with RVVI | Imperas
New open standard RISC-V Verification Interface (RVVI) offers adaptability and verification IP reuse for the expanding community of developers undertaking processor... Read more.
Mouser Electronics Launches 2022 Empowering Innovation Together Program with New Podcast on RISC-V | Raymond Yin, Business Wire
The first installment of Mouser's 2022 Empowering Innovation Together program zeroes in on RISC-V, including a new episode of The Tech Between Us podcast.
Mouser... Read more.
SEGGER collaboration makes Embedded Studio for RISC-V available at no cost | Neil Tyler, New Electronics
The partnership is focusing on making SEGGER’s multi-platform IDE Embedded Studio available, free of charge, to all HPMicro’s customers using HPM6000 series... Read more.
Codasip University Program spurs innovation and boosts curriculums | Codasip
Keith Graham appointed Head of University Program.
Codasip, the leader in processor design automation, has launched a University Program to help the next generation... Read more.
SEGGER collaborates with HPMicro making Embedded Studio for RISC-V available at no cost | SEGGER
SEGGER today announces its partnership with HPMicro Semiconductor Inc. (HPMicro), a leading supplier of high-performance MCUs and embedded solutions. The partnership... Read more.
32bit RISC-V cores are customisable for TensorFlowLite AI | Nick Flaherty, EE News Europe
Codasip has launched two 32bit RISC-V processor cores that can be optimised for machine learning applications.
The L31 and L11 are the latest cores optimized for... Read more.
Renesas expands options with Andes-based RISC-V MPU | Nitin Dahad, Embedded.com
Renesas Electronics Corporation said it has expanded the options for developers using its general-purpose microprocessor units (MPUs), with a new MPU built around... Read more.
MPU leverages 64-bit RISC-V core | Susan Nordyk, EDN
Renesas offers the RZ/Five general-purpose MPU, its first built around a 64-bit RISC-V core from Andes Technology. The RZ/Five is optimized to provide the performance... Read more.
$39 MangoPi-Nezha MQ RISC-V developer board runs OpenWrt, Debian, or RT-Smart RTOS (Crowdfunding) | Jean-Luc Aufranc, CNX Software
MangoPi-Nezha MQ tiny developer board with Allwinner F133-A (aka Allwinner D1s) RISC-V processor with 64MB on-chip RAM has just launched on Crowd Supply for $39,... Read more.
Open standard for RISC-V verification is announced at DVCon | Caroline Hayes, Electronics Weekly
At this year’s (virtual) functional design and verification conference, DVCon US 2022, the RISC-V Verification Interface (RVVI) was announced by Imperas Software.... Read more.