SpacemiT, a RISC-V AI CPU company based in China, has announced significant advancements in its development of the SpacemiT Vital Stone® V100 server CPU chip, which now offers a comprehensive hardware and software platform that…
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US RISC-V AI chip designer Inspire Semiconductor Holdings is to de-list from the TSXV Venture Exchange in Toronto today, following a move to go private. Inspire, based in Austin, Texas,…
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S2C Launches Prodigy S8-100 Series: 100M Gate FPGA Prototyping for AI and HPC December 19, 2024 – S2C, a global leader in FPGA-based prototyping solutions, announces its Prodigy S8-100 Logic…
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BOS Semiconductors in Korea has developed the industry’s first RISC-V AI accelerator chiplet using IP from US startup Tenstorrent. The Eagle-N chiplet was jointly developed by the two companies with the Tenstorrent…
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A leading IP company for high performance, AI-enabled, RISC-V processors, Semidynamics has announced that it has been selected by UPMEM as its core provider for its next generation of LPDDR5X…
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Artificial intelligence is increasingly transforming industries, and adopting RISC-V as a flexible and scalable architecture plays a significant role in this shift. Ian Ferguson, senior director at SiFive, shared insights…
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A leading IP company for high performance, AI-enabled, RISC-V processors, Semidynamics has announced that it has been selected by UPMEM as its core provider for its next generation of LPDDR5X…
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Artificial intelligence is increasingly transforming industries, and adopting RISC-V as a flexible and scalable architecture plays a significant role in this shift. Ian Ferguson, senior director at SiFive, shared insights…
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Semiconductor veterans secure $3.7M seed funding to launch a universal RISC-V processor that eliminates the need for specialized chips, enabling advanced AI at no additional cost in embedded systems by…
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Zhao Jiang, Alibaba DAMO Academy In recent years, the rapid advancement of AI technologies, particularly deep learning, has significantly increased the demand for computing power, especially for matrix operations in…
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