HPC

End-to-end ASIC partnership to accelerate global supercomputing market with open-standard, energy-efficient silicon. Aion Silicon announced it has secured a $12 million engagement to provide comprehensive design services for a confidential customer developing next-generation…

Andes Technology has teamed with S2C to develop an FPGA-based prototyping system for its latest RISC-V cores with extensions. The strategic deal uses S2C’s new Prodigy S8-100 FPGA prototyping platform,…

San Jose, CA – April 23, 2025 – Andes Technology (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), the leading supplier of high-efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International,…

Abstract The European Processor Initiative (EPI) is a project dedicated to developing a general-purpose processor and an accelerator, alongside the necessary software layers for their integration into the High Performance…

RISC-V is an open Instruction Set Architecture (ISA), where the ISA can be thought of as the contract between the software and hardware worlds. Since RISC-V was first released around a decade…

MOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--Esperanto Technologies™, a leading developer of RISC-V chips and software for high-performance computing (HPC) and artificial intelligence (AI), today announced that they are cooperating with NEC Corporation…