2026 Board of Directors Elections

OrganisationAheadComputing, Inc.Professional BackgroundDebbie Marr is the CEO and co-founder of AheadComputing, a company focused on delivering industry-leading CPU performance for the RISC-V ecosystem. Prior to founding AheadComputing, Debbie was an Intel Fellow and Chief Architect of Intel’s advanced CPU development organizations. During her 33-year career at Intel, she played key leadership roles in the development of numerous Intel processors, including serving as server architect of the Intel® Pentium™ Pro processor, bringing Intel® Hyper-Threading Technology from concept to product, serving as Chief Architect of the 4th Generation Intel® Core™ processor (Haswell), and leading advanced development of subsequent Intel Core and Xeon processor families. In addition to product development, Debbie spent seven years in Intel Labs as Director of the Accelerator Architecture Lab, leading research in machine learning, heterogeneous computing, and acceleration technologies spanning CPUs, GPUs, FPGAs, and AI accelerators. Throughout her career, she has helped define and evolve processor architectures in areas including memory systems, security, virtualization, parallel computing, multithreading, and vector architectures. She worked closely with operating system vendors, software developers, cloud providers, hardware partners, and other ecosystem stakeholders to gather requirements, contribute to industry standards and ecosystem alignment, and enable broad software and hardware support for new architectural capabilities. She is recognized as an expert in x86 and Arm architectures and led development of the x86S architecture specification introduced in 2023. Debbie holds more than 40 patents and has authored over 25 publications in leading academic and industry conferences. She earned a Ph.D. from the University of Michigan, an M.S. from Cornell University, and a B.S. from the University of California, Berkeley.Current RISC-V RolesGeneral Strategic MemberDeclaration of IntentRISC-V has created a unique opportunity for the industry to collaborate around an open architecture that enables innovation across computing markets. As adoption accelerates, the ecosystem must continue to strengthen software enablement, architectural leadership, industry collaboration, and ecosystem alignment to achieve its full potential. If elected to the RISC-V International Board of Directors, I will work to support the long-term growth, competitiveness, and technical leadership of the RISC-V ecosystem. I bring firsthand experience developing technologies for client, server, cloud, data center, and AI workloads, along with decades of experience in product development, advanced research, and ecosystem engagement. I have worked across the computing industry with operating system developers, application providers, cloud companies, hardware vendors, semiconductor manufacturers, researchers, and standards organizations, and I understand the importance of aligning diverse stakeholders around a common vision. I also bring a broad network of relationships spanning academia, industry, and professional organizations, including IEEE and ACM. As CEO and co-founder of AheadComputing, I am deeply committed to the future success of RISC-V and will advocate for decisions that strengthen the ecosystem, encourage broad participation, and support the development of high-performance, interoperable, and commercially successful RISC-V solutions. My goal as a Board member is to help ensure that RISC-V remains an open, innovative, and globally relevant architecture that enables technical excellence and sustainable ecosystem growth.

OrganisationRed HatProfessional BackgroundStrategic member board representative for the past 2 years, RISC-V Ambassador and regular speaker at events, previous RISC-V / LF staff member, RISE Project principal.Current RISC-V RolesCurrent elected board representative on behalf of Strategic membersDeclaration of IntentContinue role as elected board representative on behalf of Strategic members.

OrganisationMicrochip TechnologyProfessional BackgroundI am a Technical Fellow at Microchip Technology, with more than three decades of experience spanning semiconductor manufacturing, system architecture, and long-range product planning. I began my career as a process engineer at Actel in 1987 and transitioned into product planning leadership around 2000, where I have contributed to multiple generations of FPGA and SoC platforms. I became engaged with RISC-V in 2014 and have been an active contributor to its growth and adoption since its early stages. As an inaugural member of the RISC-V International Board of Directors since 2016, I have been closely involved in the evolution of both the technology and the organization. My work has included supporting ecosystem development, promoting adoption across industry and government applications, and helping position RISC-V in domains requiring long-term reliability and architectural flexibility.Current RISC-V RolesBoard of Directors (Strategic Representative)Declaration of IntentI am seeking to continue my service on the RISC-V International Board of Directors to help guide the organization through its next phase of growth and global adoption. Having been involved since the early formation of RISC-V and as an inaugural board member, I bring both historical perspective and a practical understanding of its evolution—from early adoption to deployment in some of the most demanding application domains. Notably, RISC-V has achieved meaningful traction in areas such as space and automotive earlier than many anticipated, demonstrating its viability in environments requiring high reliability and long lifecycle support. As RISC-V continues to mature, I believe the next phase requires expanding this success more broadly across additional markets and applications, while maintaining the qualities that enabled its early adoption. This involves continued alignment across a growing and increasingly diverse ecosystem. Key areas of focus for me include supporting the long-term health and sustainability of the ecosystem, ensuring that participants can successfully build viable businesses around RISC-V; navigating an increasingly complex global environment in a way that preserves openness while enabling broad collaboration; and encouraging effective approaches to vertical market development that balance coordination with the diversity of the membership. If elected, I will continue to contribute a pragmatic, long-term perspective to board discussions and represent the broader membership in a way that supports the continued growth and global relevance of RISC-V as an open standard.

OrganisationVRULL GmbHProfessional BackgroundPhilipp Tomsich is the founder and Chief Technologist of VRULL GmbH, a Vienna-based engineering consultancy specialising in compiler development, standards development and strategic R&D services for semiconductor companies, with one of the deepest concentrations of RISC-V expertise in Europe. His engagement with RISC-V spans the full stack — from microarchitecture and ISA extension design through to LLVM and GCC compiler toolchains. Philipp and his team have contributed extensively to RISC-V specification and software, including the specification of the Integrated Matrix Extension. Before his involvement in RISC-V, he worked on the ARMv8 software ecosystem, ran an embedded systems engineering company, worked on government IT systems, and on Java at Silicon Graphics. Within RISC-V International, he currently serves on the Board of Directors as Board Treasurer, and holds technical leadership roles as Vice-Chair of the Technical Steering Committee and Chair of the Applications & Tools Horizontal Committee.Current RISC-V RolesElected Director (Strategic Membership Class); Board Treasurer; Technical Steering Committee (Vice-Chair); Applications & Tools HC (Chair); RISC-V Summit Europe Steering Committee; RISC-V Summit Europe Program Committee; RISC-V Summit China Steering CommitteeDeclaration of IntentI am standing for election as a Strategic Director and would be honoured to continue serving the membership — including, if the Board so wishes, in my current role as Board Treasurer. During my time on the Board, one financial achievement I am particularly proud of is ensuring that RISC-V International now earns interest on its cash reserves — a straightforward but meaningful change that puts the organisation’s funds to work on behalf of its members. On the technical side, I have contributed directly to the RISC-V matrix extension effort and authored the Integrated Matrix Extension, work I intend to keep supporting as these specifications mature. Looking ahead, my priorities as a Director would be: 1. Accessibility for all members — making RISC-V genuinely accessible to every member organisation, regardless of size or resources. 2. Responsible budgeting — deploying effectively while avoiding increase in membership fees. 3. Geographic balance — ensuring that all geographic interests are represented.

Organisation10xEngineersProfessional BackgroundBilal Zafar is the co-founder and CEO of 10xEngineers, a hardware services company focused on RISC-V.Current RISC-V RolesChair, Certification Steering CommitteeDeclaration of IntentI am running for the RISC-V International Board of Directors to represent the Strategic Member Tier. As Chair of the RISC-V Certification Steering Committee, I have a proven track record as a trusted, vendor-neutral mediator who builds consensus across global companies to ensure the interoperability of software across various RISC-V implementations. As Co-founder and leader of 10xEngineers, I have driven our many contributions to open-source RISC-V cores (e.g., CVA6), compilers (IREE), operating systems (ThreadX), and architecture compatibility tests. Furthermore, as an official RISC-V Lab Partner, my team hosts Cloud-V, the largest CI platform providing global open-source developers free-of-cost access to RISC-V hardware. My vision for RISC-V is not to simply replicate the historical trajectories of x86 or ARM. Instead, we must position RISC-V to lead the next era of computing — one defined by heterogeneous architectures, AI-accelerated workloads, and application-specific customization. Hardware flexibility alone is not enough. If elected, my primary focus will be advocating for expanded RVI support for the software ecosystem. We must actively lower the barrier to entry for software developers, optimize critical toolchains, and ensure seamless software-hardware co-design. I am fully committed to championing the collective interests of all Strategic members, driving interoperability, and ensuring RISC-V leads the future of intelligent computing.

OrganisationInstitute of Software, Chinese Academy of Sciences (ISCAS)Professional BackgroundHongbin Zhang leads the RISC-V AI Infrastructure team at the Institute of Software, Chinese Academy of Sciences (ISCAS). He received his Ph.D. degree from the University of Chinese Academy of Sciences. His research focuses on AI system software and compiler technology. He is the initiator of Buddy Compiler, an AI compiler project for RISC-V, and is currently building the RuyiAI software stack for RISC-V to support practical and scalable AI deployment. As a member of the RISC-V International TSC, he has extensive experience in community coordination, technical collaboration, and ecosystem development. He is also working with his team to advance RISC-V support in the PyTorch and LLVM community, while collaborating with multiple RISC-V vendors to strengthen the broader AI software ecosystem.Current RISC-V RolesRISC-V International TSC Member; RISE AI/ML SIG Co-LeaderDeclaration of IntentHongbin Zhang is willing to serve as a Strategic Director on the 2026 RISC-V Board of Directors. He is committed to advancing RISC-V as a global open standard and strengthening its software ecosystem, especially in AI, compiler infrastructure, and system software. If elected, Hongbin will work to promote broader adoption of RISC-V, support collaboration across technical groups, open-source communities, and industry partners, and help improve ecosystem readiness on real hardware platforms. He hopes to contribute his technical experience and international community engagement to the long-term growth of RISC-V International.

OrganisationNeotechProfessional BackgroundSoftware Product Manager with a background in software engineering, cloud technologies, and community building.Declaration of IntentI, Fatima Aruna, hereby declare my intent to stand for nomination in the 2026 Board Elections for the position of Academic and Community Representative. I am motivated by a strong commitment to advancing inclusive participation, strengthening collaboration between academic and community stakeholders, and ensuring that diverse voices are meaningfully represented in decision-making processes. With my background in software engineering, cloud technologies, and community building, I bring a multidisciplinary perspective that bridges technical expertise with real-world community engagement. Over the years, I have actively contributed to initiatives in technology ecosystems, research on innovation and entrepreneurship, and capacity-building efforts aimed at empowering individuals and organizations. If elected, I intend to focus on: promoting transparent and inclusive communication between academic and community members; supporting initiatives that enhance learning, collaboration, and knowledge sharing; advocating for practical, impact-driven programs that address real community needs; strengthening engagement structures to ensure accessibility and representation for all stakeholders. I am committed to serving with integrity, accountability, and dedication, and to contributing meaningfully to the growth and effectiveness of the board.

OrganisationETH ZurichAcademic BackgroundFrank Gurkaynak is a senior scientist at ETH Zurich and has been involved in open source hardware as part of the PULP Platform effort since 2013. He has helped organise various workshops and summer schools on open source hardware, as well as the RISC-V EU Summit. As a lecturer at ETH Zurich he teaches digital circuits, computer architecture and IC design.Current RISC-V RolesRISC-V Board of Directors — Community Organisation RepresentativeDeclaration of IntentI have been the community organization representative at RISC-V International for the past two years. People that know me would say that I am loud and opinionated. I think these are important qualities for representing the interests of academia and community organizations as we have a relatively small voice (1 in more than 20) in the board of directors. With your support I would like to continue to make sure that our concerns are heard and as a community our contributions are acknowledged in RISC-V International.

OrganisationHarvey Mudd CollegeAcademic BackgroundProf. David Harris is the Harvey S. Mudd Professor of Engineering Design at Harvey Mudd College and Interim Chair of the Engineering Department. He has developed chips at Intel, Broadcom, Hewlett-Packard, Sun Microsystems, and elsewhere. He is the author of several textbooks including the upcoming RISC-V System-on-Chip Design, Digital Design and Computer Architecture RISC-V Edition, CMOS VLSI Design, and Logical Effort. He is a lead developer of the CORE-V Wally configurable RVA22-compatible core with OpenHW Group, and a lead developer of the RVI Architectural Certification Test 4.0 suite (riscv-arch-test).Current RISC-V RolesChair, Certification Steering Committee Test Plan Working GroupDeclaration of IntentI have learned a tremendous amount over the past seven years writing books about RISC-V and developing an open RISC-V core and playing a major role in RISC-V certification. If elected to the board, I would bring perspectives from the open-source community, academia, and industry.

OrganisationInatelAcademic BackgroundElectronic Engineer

Academic BackgroundProfessorCurrent RISC-V RolesVice-chair of the Board of Directors; Chairman of the Long Instructions Task GroupDeclaration of IntentI have been a director for six years now and have driven important strategic and operational initiatives on the board. It is important to have active, well connected community representatives on a large board of major companies. I think I have been successful in this over the years, in particular in driving summits and events across the globe, organizational health and strategic goals. In the next term I want to continue this work and put a stronger emphasis on the importance of the decreased number of individual members as recognized experts and advocates of the organization, as well as supporting to strengthen the involvement of universities. I want to further strengthen the organization robustness, ensuring that funds are well spent and that we can freely operate globally from our Swiss incorporation.

OrganisationSOPIC (Shanghai Open Processor Innovation Center)Professional BackgroundHolding a Master’s degree in Computer Science, Jam Zhou serves as Technical Lead at SOPIC. With long-term experience in building open-source software ecosystems and exploring emerging technologies, he keeps a close focus on the development of the RISC-V community, and strives to promote its vigorous growth and collective progress.Declaration of IntentI formally declare my candidacy for the Community Representative of RISC-V International. If elected, I will listen to the needs of academia and community developers, facilitate technical exchanges between China and the rest of the world, and work with all members to build an open, inclusive and thriving RISC-V ecosystem.