We’re holding another edition of the RISC-V microconference for Plumbers at 2023. Broadly speaking anything related to both Linux and RISC-V is on topic, but discussions tend to involve the following categories:
- How to support new RISC-V ISA features in Linux, both for the standards and for vendor-specific extensions.
- Discussions related to RISC-V based SOCs, which frequently include interactions with other Linux subsystems as well as core arch/riscv code.
- Coordination with distributions and toolchains on userspace-visible behavior.
Accomplishments post 2022 Microconference
All the talks at the 2022 Plumbers microconference have made at least some progress, with many of them resulting in big chunks of merged code.
- The riscv_hwprobe() syscall has been merged.
- Support for ACPI has been merged.
- Kconfig.socs is in the process of being refactored.
- Preliminary patches for the RISC-V TEE have been posted.
- Some optimized routines have been merged, but there’s still a long way to go.
- Text patching is still up in the air, but we’ve been working through many of the issues pointed out during the discussions.
Likely Topics for Discussion Sections
The actual list of topics tends to be hard to pin down this early, but here’s a few topics that have been floating around the mailing lists and may be easier to resolve in real-time:
- Do we even bother with generic optimized lib routines, or just go vendor-specific?
- When can we start deprecating stuff? Likely-unused bits include: rv32, nommu, xip, old toolchains.
- Is it time to give up on profiles and just set a base ourselves?
- CI: Hosting PW-NIPA (currently hosted by Conor/Microchip), hosting “upstream kernel ci” on Github w/ sponsored runners?
- Hardware assisted control-flow integrity on RISC-V CPUs.
- Handling text patching on RISC-V systems.
- How do we deal with vendor-specific memory management?
Submissions are made via LPC submission systems, selecting Track RISC-V MC